1. Field of the Invention
This invention relates to an electrically alterable read-only memory and more particularly to an improved thin film semiconductor memory device for use in an electrically alterable read-only memory.
2. Description of the Prior Art
Most semiconductor memory cells are volatile in the sense that data is lost in the event of a power failure. However, it has been discovered that certain amorphous semiconductor materials are capable of being switched to and from a low resistance crystalline state in order to provide a non-volatile memory cell. Particular materials that may be employed for this purpose are disclosed in Ovshinsky U.S. Pat. No. 3,271,591 and Neale U.S. Pat. No. 3,699,543. Such materials are a tellurium based chalcogenide class materials which have the general formula: EQU Ge.sub.A Te.sub.B X.sub.C Y.sub.D
and are commonly referred to as "Ovonic" materials. Such high resistance semiconductor materials have a multi-constituent memory layer and can be placed between a pair of spaced apart electrodes such that the application to one of those electrodes of a voltage pulse of appropriate duration and volume produces a relatively low resistance filamentous crystalline path (set operation). A reset set of pulses of appropriate value and duration causes the crystalline path to return to a high resistance state (reset operation).
It has also been discovered that it is possible to obtain a non-volatile memory cell on the basis of a chalcogenide semiconductor that contains a lesser number of components. However, a thin layer of dielectric should additionally be placed between one of the electrodes and the memory layer. Soviet Union Patent No. 1081667 discloses non-volatile memory device in which a thin layer of dielectric, with thickness of 5.0-6.0 nm, was placed between an amorphous memory material layer on the basis of a two-component semiconductor and one of the electrodes. In Bernede's and Conan's work, J.Phys.D.: Appl. Phys. V.16, 1983, p.1307-1310, the switching effect in layered structures with an intermediate barrier layer is identified as being conditioned on a negative charge fitted into a thin layer of dielectric.
The prior-art designs of Ovonic memory switches have had a characteristic threshold voltage (V.sub.thf) which declines continuously throughout the life of the switch. However, there are instances (Buckley U.S. Pat. No. 3,886,577 and Bluhm U.S. Pat. No. 4,115,872) where it appears that the devices lasted throughout 10.sup.6 set-reset cycles and the threshold voltage was relatively invariant to additional write cycles.
In the above mentioned Bluhm patent, it was disclosed that electromigration of the constituents of the memory material toward different electrodes causes the steady decline of threshold voltage (V.sub.thf). This migration of materials produces regions that are inactive the switching process because constituent ratios are no longer appropriate. As a result, the region where the ratio of constituents is appropriate for switching is thus reduced in effective thickness and the threshold voltage (V.sub.thf) becomes low, similar to that of a much thinner layer.
To remove this undesirable effect, the Bluhm patent prefers the use of an Ovonic switch in which the memory layer is placed between the films of tellurium and germanium tellurium. The main idea of the Bluhm invention is to create a region with accumulated constituents of the memory material layer near opposite electrodes toward which diffusion of these constituents takes place. Thus, since the relatively electronegative tellurium migrates to the positive electrode, then near this electrode it is necessary to produce a region accumulated by tellurium. On the other hand, since the relatively electropositive germanium migrates to the negative electrode, then a layer with accumulated germanium should be placed between this negative electrode and the amorphous memory material layer.
While the Bluhm patent was directed to solving problems of electromigration, nothing was disclosed about the influence of electrodiffusion on certain components of the memory layer such as antimony (Sb) and Sulfer (S) and how they effect the characteristics of the memory device. Thus, memory cell embodiment discovered by Bluhm alters the threshold voltage decline but does not eliminate it.
Tellurium is the main constituent of the memory material layer. It is a piezoelectric material in which elastic deformations are pulsing under the influence of external electric fields. These elastic deformations can be caused by internal electric fields which are produced by electrically active impurity centers. Soviet Crystalographia, 1992, V. 37, N.5, p.1093-1099 discloses that if a donor-acceptor impurity concentration is rather high (critical), the structure of a piezoelectric material can become unstable due to external and internal effects, and thus undergo various transformations into metastable states. Such metastable states are particularly characteristic at the interface of films. The film interface of tellurium (Te) and germanium tellurium (GeTe) or tellurium (Te) and stanus tellurium (SnTe) have a gradual transition from hexagonal to a cubic structure. Because of the mutual diffussion of the constituents of such films, the gradual succession of this transition is the following: Te-GeTe.sub.2, SnTe.sub.2 (CdI.sub.2 type); GeTe, SnTe (NaCl type), that is, a combination that has the structure of CdI.sub.2 type appears on the films interfaces.
The present invention discloses a superstructure in the system of dislocations or vacancies that can appear on the film interface of Te-GeTe, Te-Sn Te under certain circumstances. In such case, a gradual transition from the hexagonal tellurium structure to the cubic structure GeTe, SnTe (NaCl type) can be developed by taking into account the occupancy of the structural positions and the presence of the vacancies. With certain vacancy concentrations, a superstructure of CdI.sub.2 is realized; if all of the vacancies are occupied, it leads to a NaCl type structure. Hence, it follows the main operating principle of chalcogenide memory cells, namely, the principle of reversible vacancy occupancy by impurities under the influence of external electric fields. Since the vacancies in chalcogenide semiconductor combinations are the source of the main carriers (holes), by occupying those vacancies with appropriate impurities, as it has been disclosed in the Japanese Journal Applied Physics, Pt.1, 1990, V. 29, N.10, p.2098-2102, the films resistance is increased; but when vacancies occur, the rate at which the resistance increases is slowed down. These conclusions are corroborated by various experimental research (Phil.Mag., 1973, V. 27, N.3, p.665-675; J. Non-Cryst. Sol., 1972, V 0.2, p.358-366). These articles point out that a crystal filament responsible for a low resistance state differs by its ratio of constituents from the surrounding amorphous memory layer, dependent upon the impoverishment of certain constituents, for example, antimony (Sb), Arsenic (As), Sulfer (S), and/or Selenium (Se).
The present invention discloses that the main criterion for the formation of a superstructural vacancy regulation system is that the concentration of the impurities should be sufficient for the manifestation of dipole-dipole interaction. This interaction produces rather powerful (critical) internal electric fields which are in common with the external electric fields that will lead, as has been indicated above, to metastable structural transformations on the films interfaces.
In a memory cell, as described in Bluhm's patent, the memory material layer Ge.sub.x Te.sub.1-x Sb.sub.2 S.sub.2 (0.15.times.0.33) is placed, as it has been mentioned above, between the tellurium layer and semiconductor Ge.sub.A Te.sub.B (A:B 1:1) and this constructive solution leads to or alters the decline of the threshold switching voltage. But, it will be obvious that the memory material layer, with Ge and Te in a ratio of approximately 1:2 placed on the interface of Te and GeTe layers, does not practically differ from the chalcogenide metastable combination GeTe.sub.2, SnTe.sub.2, with CdI.sub.2 type structure. It is possible that Sb and S impurities are electrically active in such a cell as impurities and occupy or vacate the vacancies in the filament region of the memory material layer to create high ohmic or low ohmic state. However, the memory cell discovered by Bluhm is switching as well as from a low resistance (low ohmic) state with the same sign of applied voltage. The same sign of applied voltage with every next set-reset cycle leads to a gradual displacement of electrically active impurities (Sb, S ions) toward attractive poles, thus causing migration into the Te and GeTe films. Also, one can not exclude the possibility that the diffusion processes create a concentration of gradients of Sb and S impurities in the layered structure. All of this will affect the change in the electrical characteristics of memory devices and their life cycle.
It is thus an object of the present invention to provide an improved semiconductor chalcogenide memory device.
It is another object of the present invention to provide an improved semiconductor chalcogenide memory device which is not characterized by a declining threshold voltage.
It is still another object of the present invention to provide a semiconductor chalcogenide memory device which has a relatively constant threshold value over a large number of set-reset cycles.